{"id":473,"date":"2021-05-06T15:04:59","date_gmt":"2021-05-06T06:04:59","guid":{"rendered":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/?p=473"},"modified":"2021-05-06T15:04:59","modified_gmt":"2021-05-06T06:04:59","slug":"%e5%b9%b3%e6%9c%ac%e7%a0%94%e7%a9%b6%e5%ae%a4_en","status":"publish","type":"post","link":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/?p=473","title":{"rendered":"\u5e73\u672c\u7814\u7a76\u5ba4_en"},"content":{"rendered":"\n<h2 class=\"wp-block-heading\">The Ultimate Silicon Integrated Nanodevice: Toshiro Hiramoto<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\">The Ultimate Transistor Structure: Silicon Nanowire Transistors<\/h3>\n\n\n\n<p>The device architecture of VLSI has been changed from bulk planar to FinFET. It is anticipated that the device structure will be further changed to the gate-all-around nanowire transistor. We initiated the study on silicon nanowire transistors in late 1990s and reported the increase in threshold voltage due to the quantum confinement effects and higher mobility than the universal mobility for the first time. Recently, the low temperature characteristics have been studied for the application for quantum computing. We can fabricate silicon nanowire transistors with approximately 5nm nanowire width in our clean room.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"413\" src=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig1-1024x413.png\" alt=\"\" class=\"wp-image-468\" srcset=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig1-1024x413.png 1024w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig1-300x121.png 300w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig1-768x310.png 768w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig1.png 1459w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">Silicon single-electron transistors and quantum bits<\/h3>\n\n\n\n<p>We have studied the silicon single electron transistor, which consists of a silicon quantum dot, for a long time. A single electron transistor acts as a very sensitive charge sensor. On the other hand, silicon quantum dot is promising for a quantum bit (qubit) which is key to the quantum computing. We have proposed the integration of silicon qubits using stacked silicon layers.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"400\" src=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig2-1024x400.png\" alt=\"\" class=\"wp-image-469\" srcset=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig2-1024x400.png 1024w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig2-300x117.png 300w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig2-768x300.png 768w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig2.png 1435w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">New Developments in Silicon Power Devices<\/h3>\n\n\n\n<p>Although power transistors using wide bandgap such as SiC and GaN have been studied, silicon power transistors are still the mainstream technology for power electronics. Especially, IGBT (Integrated Gate Bipolar Transistors) are widely utilized in various applications of rate voltage from 650V to 6500V. Based on the new concepts of \u201cIGBT Scaling\u201d and \u201cDouble-gate IGBT\u201d, we have demonstrated the performance improvements of silicon IGBT by fabrication and measurements. In the IGBT scaling, the gate drive voltage is scaled from 15V to 5V. Then, digital gate drivers can be used, leading to intelligent power electronics. We can fabricate 3300V class silicon IGBTs in our clean room.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"426\" src=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig3-1024x426.png\" alt=\"\" class=\"wp-image-470\" srcset=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig3-1024x426.png 1024w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig3-300x125.png 300w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig3-768x320.png 768w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig3.png 1453w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">The Extended CMOS concept<\/h3>\n\n\n\n<p>New devices operating based on new physics or new phenomena are generally called \u201cBeyond CMOS\u201d, which is expected for future high speed and low power devices with higher functionalities. Based on the idea that it is impossible for Beyond CMOS to replace conventional CMOS, we proposed a concept of \u201cExtended CMOS\u201d in 2000s, where Beyond CMOS should be merged to conventional CMOS in order to complement the weakness of CMOS. This concept has been widely accepted and the figure below has been published in the famous semiconductor roadmap (ITRS, International Technology Roadmap for Semiconductor). The research in our lab is conducted based on this concept.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"549\" src=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig4-1024x549.png\" alt=\"\" class=\"wp-image-471\" srcset=\"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig4-1024x549.png 1024w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig4-300x161.png 300w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig4-768x412.png 768w, https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/wp-content\/uploads\/2021\/05\/hiramoto_fig4.png 1435w\" sizes=\"(max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n","protected":false},"excerpt":{"rendered":"<p>The Ultimate Silicon Integrated Nanodevice: Toshiro Hiramoto The Ultimate Transistor Structure: Silicon Nanowi [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[3],"tags":[],"_links":{"self":[{"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=\/wp\/v2\/posts\/473"}],"collection":[{"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=473"}],"version-history":[{"count":1,"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=\/wp\/v2\/posts\/473\/revisions"}],"predecessor-version":[{"id":474,"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=\/wp\/v2\/posts\/473\/revisions\/474"}],"wp:attachment":[{"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=473"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=473"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/nanotechnet.t.u-tokyo.ac.jp\/kairo\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=473"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}